See 'WikiDevi' @ the Internet Archive (MW XML, Files, Images)
About the System-on-Chip Model Number
The EA3500 SoC is certainly not literally the commonly reported 88F6282, since that processor series is not available in an 800MHz version. But then, here is a bit of conjecture. SmallNetBuilder reports the chip as "MRVL F6W01A1E TW1149AB C080", which would be the marking on the part itself. This would be in a form similar to the marking on the EA4500 SoC shown in the picture in this thread at DSLReports. For the EA3500 SoC, the marking will be:
MRVL F6W01 A1E TW 1149AB C080
Marvell does not show an "F6W01" SoC in their literature, so what is it?
Basically, the SoC is known to be one of the Marvell Kirkwood Series parts. As can be seen there, the 800MHz parts include the 88F6283, 88F6281, and 88F6192, but no "F6W01". However, a wider search does find a Marvel "88F6W11" as one of a series, "88F6710, 88F6707, and 88F6W11", though these are completely different next generation ARMv7 parts. Notably, the 88F6W11 has no SATA ports. There is also reported from SmallNetBuilder that "The key difference for the F6W01 is that it lacks the two SATA 2.0 ports that the other parts have."
Also, the SoC and the separate Marvell 88E6171R "Link Street" Gigabit Ethernet Switch are connected through exactly two RGMII - Reduced Gigabit Media Independent Interface - channels, and so the linux kernel "sees" only two ethernet devices. One device represents a single ethernet port, and the other device represents a single four port switch. Note that the 88F6281 and 88F6192 each have only a single PCIe port.
The actual CPU used in the SoC is a distinct thing. The linux kernel reports:
processor : 0 model name : Feroceon 88FR131 rev 1 (v5l) BogoMIPS : 795.44 Features : swp half fastmult edsp CPU implementer : 0x56 CPU architecture: 5TE CPU variant : 0x2 CPU part : 0x131 CPU revision : 1 Hardware : Marvell Kirkwood (Flattened Device Tree) Revision : 0000 Serial : 0000000000000000
This is Marvell's own core design of the ARMv5TE architecture, but without the "thumb" 16 bit instruction set feature flag.
But then, consider the Marvell time-line for the Ferocean 88FR131 and Sheeva 88SV131 CPU cores.
- 2003 Nov - Marvell acquires Asica and an ARM License
- 2005 May - Orion Series 150nm Feroceon CPU core announced
- 2006 Nov - Marvell acquires Intel X-Scale
- 2008 Jun - Sheeva CPU core and 88F6000 Series SoC announced
- 2008 Dec - 88F619x Hardware Specifications document refers to Sheeva 88SV131 ARM v5TE Processor Core
- 2009 Feb - Marvell SheevaPlug announced
- 2009 Dec - Marvell 2GHz Armada 300 Series announced
- 2010 Apr - Marvell low power Armada 310 Family announced
- 2012 Feb - Linksys EA3500 FCC approval with the "F6W01" SoC
- 2013 Feb - Marvell Product Selector Guide lists 88F6192 under Kirkwood Series and 88F6282 under ARMADA Series 300 Family
By 2012, it could be expected that all of these Kirkwood parts would be using the same Sheeva 88SV131 ARM v5TE Processor Core described in the Marvel literature, rather than the older Feroceon 88FR131 core being reported by the linux kernel, though both versions of the CPU core appear to be functionally equivalent. So very likely, the "correct" Marvel part would have been the "88F6W01 Kirkwood SoC", with no SATA ports, two RGMII ports, and two PCIe ports, if Marvell had ever published a Hardware Specification for this OEM part. But then, it may be that the "F6W01" is derived from the more recent low power 800MHz 88F6283 Armada 300/310 Family part, though that device includes an LCD controller, not needed here.
Based upon the clock frequency published for the Kirkwood Series parts, the F6W01 seems to be most similar to the Kirkwood 88F6192. The linux kernel documentation, in "Documentation/arm/Marvell/README", lists the Marvell documentation associated with this part number:
- Product Brief: 88F6192-003_ver1.pdf
- Hardware Spec: HW_88F619x_OpenSource.pdf
- Functional Spec: FS_88F6180_9x_6281_OpenSource.pdf