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MIPS 4KEc[edit]

  • Processor Identification(s):
  • 000184xx, e.g. 00018448 (Processor ID: 0x84; Maj. Rev: 0x2; Min. Rev: 0x2)
  • 000190xx alias 4KEcR2, e.g. 00019064 (Processor ID: 0x90; Maj. Rev: 0x3; Min. Rev: 0x1)
  • Datasheet:
- MIPS32 Release 2 capabilities, included in version 3.0 or higher core releases
—p. 43 in MIPS-4KEcDataSheet.pdf
  • Press Release:
- Based on MIPS32 architecture for high performance
- Hard IP cores allow designers to significantly reduce design time,
efficiently use resources, and quickly get to market
- Instruction and data scratchpad interfaces available
- 8KB Instruction and 8KB writeback Data cache for more flexibility and higher performance
- A coprocessor 2 (COP2) interface enables easy coprocessor connection and support
- Extensive clock gating reduces power consumption without reducing application performance
- Enhanced JTAG (EJTAG) debug with trace and fast download enable quick and easy debugging
- All major operating systems and compiler tool chains, and hundreds of third-party
development tools, support the MIPS architecture
- Supports CorExtend capability which enables users to significantly enhance
the value and competitive advantage of their SoC products
- Testability features include BIST and full scan

See also[edit]