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- Hard IP cores allow designers to significantly reduce design time, efficiently use resources, and quickly get to market
- Based on MIPS32 architecture for high performance
- 8KB Instruction and 8KB writeback Data cache for more flexibility and higher performance
- Instruction and data scratchpad interfaces available
- A coprocessor 2 (COP2) interface enables easy coprocessor connection and support
- Extensive clock gating reduces power consumption without reducing application performance
- Enhanced JTAG (EJTAG) debug with trace and fast download enable quick and easy debugging
- All major operating systems and compiler tool chains, and hundreds of third-party development tools, support the MIPS architecture
- Testability features include BIST and full scan
- Supports CorExtend capability which enables users to significantly enhance the value and competitive advantage of their SoC products

- Processor Identification: 00019064 (Processor ID: 0x90; Maj.Rev: 0x3; Min. Rev: 0x1)