A distinguishing characteristic of the 24KE family is the inclusion of the MIPS DSP Application Specific Extension (ASE). The MIPS DSP ASE provides support for a number of powerful data processing operations. It includes instructions for executing fractional arithmetic (Q15/Q31) and for saturating arithmetic. Additionally, for smaller data sizes, SIMD operations are supported, allowing 2x16b or 4x8b operations to occur simultaneously. Another feature of the ASE is the inclusion of additional HI/LO accumulator registers to improve the parallelization of indepen- dent accumulation routines.
- The 24KEc is a 32-bit RISC core for high performance applications.
- The 24KEf core adds an IEEE-754 compliant floating point unit. (CP0 Status Reg, Bit 29 set for Floating Point Unit)
- The 24KEc Pro core offers the CorExtend® capability. (CP0 Status Reg, Bit 17 set for CorExtend block)
- The 24KEf Pro core has both the floating point unit and the CorExtend capability.
MIPS 24KEc share same erratas with MIPS 24K only with some version offset.
|Release Identifier||PRId[Revision] Maj.min.patch/hex||Description||Date|
|2_0_*||2.0.0 / 0x40||General availability of 24KE core.||June 30, 2005|
|2_1_*||2.1.0 / 0x44||8KB cache option||December 30, 2005|
|2_2_*||2.2.0 / 0x48|| L2 support., 64KB alias-free D-cache option, option to have up to 8 outstanding cache misses (previous maximum
|July 12, 2006|
|2_3_*||2.3.0 / 0x4c||Less interlocks round cache instructions, relocatable reset exception vector location.||January 3, 2007|
|2_4_*||2.4.0 / 0x50||New UserLocal register, alias-proof I-cache hit-invalidate operation, can wait with interrupts disabled.||October 31, 2007|
|2_5_0||2.5.0 / 0x54||Errata fixes||January, 2009|