WikiDevi will be going offline 2019-10-31. For historical dumps of the database, see 'WikiDevi' @ the Internet Archive (MW XML, Files, Images).
Final dumps will be made available after the site goes offline.
There is no chance the data will not live on, in some form - even if it isn't 'WikiDevi' anymore. For example, see TechInfoDepot.

Atheros AR6002

From WikiDevi
Jump to: navigation, search


  • Manufacturer: Atheros
  • Part name: AR6002
  • Type: chip
  • Interface: SDIO, GSPI
  • IEEE 802.11 PHY Modes: a, b,g
  • CPU: Xtensa
  • JTAG: Test, ICE
  • Operating temperature range: -40 to 85 C°
  • Available in 7 x 7 mm BGA package with 0.5 mm pitch or WLCSP package with 0.4 mm pitch

CPU Xtensa[edit]

A 32-bit text book style RISC core with five-stage pipeline. It also supports 16- and 24-bit instruction encoding. This CPU has a total physical address space of 22 bits that covers 256 KB of register space, and 3.75 MB of memory address space that includes internal ROM, internal SRAM, and external memory (reserved). The AR6002G CPU and memory sub-system is designed for power and area efficiency, and flexibility to support various applications (i.e., ROM code patching, a test access port (TAP) controller that uses the standard five-wire JTAG I/F for on-chip debugging, etc.)